1. Field of the Invention
The present invention relates generally to rotary head type recording and/or reproducing apparatus and more particularly to an apparatus for encoding a time code.
2. Description of the Prior Art
In a conventional rotary head type video tape recorder (VTR), a time code, for example, SMPTE time code is recorded on a magnetic tape in its longitudinal direction for convenience sake of edition. In this case, while the revolution number of a rotary head of a VTR is 30 r.p.s, the frequency of the SMPTE time code is 30 Hz so that the segment unit of data and the value of time code correspond to each other one-to-one relation.
FIG. 1 illustrates a format of the SMPTE time code. Referring to FIG. 1, in the SMPTE time code, one frame is formed of 80 bits (bit number is 0 to 79) and hence the bit frequency is 2.4 kHz. Of the 80 bits, 32 bits are assigned to the time code, further 32 bits are assigned to user vacant bits and the remaining 16 bits are assigned to a sync. word. Time code of 32 bits is formed of a frame code, a second code, a minute code and an hour code and indicates the second, minute, hour and the order of a frame. Each of the time codes is divided into 4 bits by 2 between adjacent ones of which the user bits of 4 bits each are inserted. The sync. word of 16 bits is used to check whether a magnetic tape is transported in the positive direction, or the SMPTE time code is read out in the direction shown by an arrow F or whether the magnetic tape is transported in the opposite direction, or the SMPTE time code is read out in the direction shown by an arrow R. Accordingly, regardless of the direction in which the magnetic tape is transported, the code signal can be read out correctly.
The code signal is a so-called bi-phase signal in which data "1" and "0" are represented by the difference between inverting phases, as shown in FIG. 1. In the illustrated example, time code indicates 29 frames, 59 seconds, 59 minutes and 23 hours.
By the way, a rotary head type digital audio tape recorder (hereinafter simply referred to as "R-DAT") is proposed, in which the revolution number of a rotary head is 100/3 sec. FIG. 2 illustrates an example of such R-DAT.
Referring to FIG. 2, there is shown a rotary drum 1 of which the diameter is 30 mm and which is rotated at 2000 r.p.m. A pair of magnetic heads 2A and 2B are mounted on the rotary drum 1 with an angular spacing of 180.degree., and a magnetic tape 3 is wrapped around the peripheral surface of the rotary drum 1 over a tape wrapping angle of 90.degree.. The magnetic tape 3 is stretched between reel hubs 4A and 4B and transported at the speed of 8.15 mm/second by a capstan 5 and a pinch roller 6.
When the magnetic heads 2A and 2B slidably contact with the magnetic tape 3 alternately, slant tracks 7A and 7B are formed on the magnetic tape 3 as shown in FIG. 3. The tape width A of the magnetic tape 3 is selected to be 3.81 mm. The magnetic gap of one rotary head 2A is inclined by +.alpha. relative to the direction perpendicular to the track whereas the magnetic gap of the other rotary head 2B is inclined by -.alpha. relative to the direction perpendicular to the track. In this case, .alpha. is selected to be 20.degree.. The angles of the magnetic gaps of the magnetic heads 2A and 2B are referred to as +azimuth and -azimuth, respectively.
Referring back to FIG. 2, the magnetic heads 2A and 2B are alternately selected by a head change-over switch 8, and a recording signal from a contact r of a recording/reproducing switch 9 is supplied through a rotary transformer (not shown) to the magnetic heads 2A and 2B. While, reproduced signals from the magnetic heads 2A and 2B are delivered through a rotary transformer (not shown) to a contact p of the recording/reproducing switch 9.
An analog audio signal applied to an input terminal 10 is supplied through a low pass filter 11 to an analog-to-digital (A/D) converter 12, in which it is converted to a digital audio signal (at the sampling frequency of 48 kHz and the linear quantization of 16 bits). The digital audio signal from the A/D converter 12 is supplied to a recording signal processing circuit 13. In the recording signal processing circuit 13, the digital audio signal is added with an error correction code and is converted to a format of recording data which will be described later. In this case, an ID signal (PCM (pulse code madulated)-ID) to identify the on/off of pre-emphasis of a signal to be recorded, the sampling frequency and the bit number of quantization is added to the digital audio signal. A program number of the signal to be recorded, a sub-code such as a time code or the like and an ID signal for the sub-code (sub-code ID) are formed by a sub-code encoder (not shown) and then supplied through a terminal 14 to the recording signal processing circuit 13.
The recording signal processing circuit 13 generates serial recording data of one track amount in synchronism with the revolution of the magnetic heads 2A and 2B. The recording data is supplied through a recording amplifier 15 and the contact r of the recording/reproducing switch 9 to the head change-over switch 8. The change-over switch 8 permits the recording data to be supplied to the magnetic heads 2A and 2B, alternately.
The signal reproduced by the magnetic heads 2A and 2B is supplied through the head change-over switch 8 and the contact p of the recording/reproducing switch 9 to a playback amplifier 16. The output signal from the playback amplifier 16 is supplied to a PLL (phase-locked loop) circuit 17, in which a clock synchronized with the reproduced signal is extracted from the output signal of the playback amplifier 16. The reproduced signal from the PLL circuit 17 is supplied to a reproduced signal processing circuit 18, in which it is subjected to error correction, error interpolation and so on. A reproduced digital audio signal from the reproduced signal processing circuit 18 is supplied to a digital-to-analog (D/A) converter 19. A reproduced audio signal from the D/A converter 19 is delivered through a low pass filter 20 to an output terminal 21. At the same time, the sub-code and the sub-code ID are separated in the reproduced signal processing circuit 18 and then fed to an output terminal 22. To the output terminal 22, there is connected a sub-code decoder (not shown) in which control data and so on are formed from the sub-code.
A timing control circuit 23 is adapted to form control signals to control the head change-over switch 8 and the recording/reproducing change-over switch 9, respectively. The timing control circuit 23 also generates a clock signal and a timing signal necessary for both the recording signal processing circuit 13 and the reproduced signal processing circuit 18, respectively.
A format of data used in this R-DAT will now be described.
One segment assumes the whole of data to be recorded on one track. FIG. 4A illustrates a data format of one segment recorded by one rotary head. If the unit amount of recorded data is taken as one block, one segment contains data of 196 blocks (7500 .mu.sec). Referring to FIG. 4A, margins (11 blocks) are assigned to one segment at its both end portions corresponding to both end portions of the track. Sub-code 1 and sub-code 2, each formed of 8 blocks, are recorded adjacent to the margins, respectively. Two sub-codes 1 and 2 are the same data, whereby the double recording is carried out. The sub-code indicates the program number and the time code. A PLL run-in interval (2 blocks) and a post-amble interval (1 block) are assigned to both sides of the recording areas of 8 blocks in each of the sub-codes. Further, inter-block gaps (3 blocks) are provided, on which no data is recorded, and a pilot signal for ATF (automatic tracking follow) system is recorded on the recording areas of 5 blocks between the inter-block gaps. A PCM (pulse code modulated) signal which is subjected to the recording process is recorded on the recording area of 128 blocks within the central recording area of 130 blocks of one segment except for the PLL run-in interval of 2 blocks. This PCM signal is data corresponding to an audio signal of the period during which the rotary head is rotated one half.
This PCM signal is formed of 2-channel stereo PCM signal of L (left) channel and R (right) channel and parity data for error detection/error correction. When one segment shown in FIG. 4A is recorded and/or reproduced by the magnetic head 2A, data Le is recorded on the left-hand side half of the PCM signal recording and/or reproducing area, whereas data Ro is recorded on the right-hand side half thereof. Data Le is formed of even-numbered data of L channel and parity data for this data, whereas data Ro is formed of odd-numbered data of R channel and parity data for this data. The odd and even numbers are determined by counting the beginning of the interleaved block.
On the track formed by the second magnetic head 2B, there are recorded data of one segment which is same in format as that of the above one segment. Data Re is recorded on the left-hand side half of the data interval contained in data of one segment of the other track and data Lo is recorded on the right-hand side half thereof. Data Re is formed of even-numbered data of R channel and parity data therefor whereas data Lo is formed of odd-numbered data of L channel and parity data therefor. As described above, even-numbered data and odd-numbered data of respective channels are separately recorded on two adjacent tracks and data of L channel and R channel are recorded on the same track so that continuous data of the same channel can be prevented from becoming erroneous due to the drop-out or the like.
FIG. 4B illustrates data format of one block of PCM signal. As shown in FIG. 4B, a block synchronizing signal of 8 bits (one symbol) is assigned to the beginning of one block and a PCM-ID of 8 bits is assigned next to the block synchronizing signal. A block address of 8 bits is assigned next to the PCM-ID. 2 symbols (W1 and W2) of PCM-ID and block address are subjected to the error-correction coding by using a simple parity and then a parity of 8 bits is assigned next to the block address. As FIG. 4D shows, the block address is formed of 7 bits except the most significant bit (MSB) and identifies the PCM block by making the MSB "0".
FIG. 4C illustrates the data format of one block of the sub-code and which is arranged the same as the data format of the afore-mentioned PCM block. As illustrated in FIG. 4E, this symbol identifies itself as the sub-code block by making the MSB of the symbol W2 of the sub-code block "1". The lower 4 bits of the symbol W2 are assigned to the block address, and 8 bits of the symbol W1 and 3 bits of the symbol W2 except the MSB and block address constitute the sub-code ID. 2 symbols (W1 and W2) of the sub-code block are subjected to the error correction coding by using a simple parity and then a parity of 8 bits is added thereto.
2 symbols W1 and W2 of the sub-code block are constructed as shown in FIG. 5.
As illustrated in FIG. 5, the MSB of the symbol W2 is used to identify whether the block is the sub-code block or PCM block. When the block is the sub-code block, the MSB becomes "1" as shown in FIG. 5. The lower 4 bits of the symbol W2 are the block address and the content of the sub-code ID is different dependent on whether the least significant bit (LSB) thereof is "0" or "1". When the LSB of the block address is "0", the symbol W1 is formed of the control ID of 4 bits and data ID f 4 bits, whereas 3 bits except the MSB and the block address of the symbol W2 are assigned to the format ID.
When the LSB of the block address is "1", 3 bits except the symbol W1, the MSB and the block address in the symbol W2 indicate a program number. In this case, the program number is expressed by the binary-coded decimal (BCD) code of 3 digits, wherein PNO-ID (1) of 3 bits in the symbol W2 indicate the most significant digit, PNO-ID (2) of upper 4 bits in the symbol W1 indicate the intermediate digit and PNO-ID (3) of lower 4 bits in the symbol W1 indicate the least significant digit. The program number from "001" to "799" can be expressed. "000" indicates that no program number is recorded, while "0AA" indicates that the program number is invalid.
The sub-code block in which the LSB of block address is "0" and the sub-code block in which the LSB of block address is "1" are alternately recorded on each 4 blocks of 8 blocks in each sub-code area.
When the data ID is "0000", this means that a pack data exists in the sub-code area. At that time, the format ID indicates a pack application area. When the format ID is "000", this means the absence of pack data. FIG. 6 illustrates a pack format. As illustrated in FIG. 6, the pack format consists of item block of 4 bits, and data and parity block of 60 bits. In other words, the pack format is formed of 8 symbols of PC1 to PC8, in which upper 4 bits of symbol PC1 are assigned to item block, symbol PC8 is assigned to parity block and others are assigned to data block. The item block of 4 bits indicates the mode of the content of the pack data. When the item block is, for example, "0001", the pack data indicates the program time mode, and the pack format of this program time mode is illustrated in FIG. 7.
In the R-DAT as described hereinabove, it may be considered to record a time code such as the SMPTE time code for convenience sake of edition. However, while the frequency of data segment of the R-DAT is 100/3 Hz as described above, the frequency of the SMPTE time code is 30 Hz. Hence, there is then a defect that the value of data segment and the value of the time code are not coincident in one-to-one relation.
Further, since the data segment and the time code can be synchronized with each other at the unit of several seconds or several minutes, they can be corresponded by a correspondence table. However, the correspondence table of several minutes requires a memory of large capacity. Also, when the recorder is operated in synchronism with the time code, the response is delayed.